The Ideal Diode

The following article explains the theory of operation of an ideal diode circuit implemented using a p-channel MOSFET and a matched PNP transistor pair. Typical applications for the ideal diode are devices such as solar chargers, where power efficiency is of a great importance.

Introduction

Diodes are devices that allow the electric current to flow in only one direction. As shown in the image below, the current is allowed to flow from the anode towards the cathode but not the other way around.

Diodes have many applications ranging from simple reverse polarity protection to full bridge rectifiers. There is plenty of available material explaining the diode basics, therefore I would like to skip this part and only cover one particular aspect of diodes which makes them rather power inefficient devices. This article shall cover the forward voltage drop denoted in the datasheet as V_F.

V_F is the voltage measured between the anode and the cathode of a diode subjected to an electric current I_F in its forward direction. Whereas the anode corresponds to the positive side and the cathode to the negative. Typical values of V_F are 0.6V for a standard silicone Diode and as low as 0.1V for a Schottky type diode. The value of V_F is a function of the forward bias current I_F as shown in the diagram below.

The above diagram plots the forward voltage drop V_F (horizontal axis) versus the forward bias current I_F (vertical axis) for a 1N4007 or similar diode. As one can see, V_F can go as high as 1 Volt for 1 Ampere of current, which results in a dissipated power loss of 1 Watt.

As the name of this article suggests, the ideal diode is one which exhibits no (or very little) power loss. Thus, it should have V_F = 0 (or close to) for a wide range of I_F. Presented in this article is a small circuit that mimics the behavior of of a diode with a near zero forward voltage drop.

Circuit Diagram

As seen in the schematic below, the ideal diode consists of a p-channel MOSFET Q2 and a voltage comparator consisting of a matched PNP transistor pair Q1A and Q1B.

MOSFET

The IRLML2244 p-channel MOSFET Q2 is driven in the reverse direction, whereas its drain pin 3 is connected to the input voltage V_{in} and its source pin 2 provides the output voltage V_{out}. This ensures that the MOSFET’s intrinsic diode is aligned in the direction of forward current flow and prevents any reverse current from flowing through it.

This MOSFET exhibits a very low static drain-to-source on-resistance R_{DS(on)} \approx 42m\Omega at a gate-source voltage of V_{GS} = -4.5V and a drain current of I_D = -4.3A (see datasheet). The resulting measured forward voltage drop amounts to V_F \approx 50mV at I_F=1A.

Voltage Comparator

A voltage comparator circuit has been implemented around the PNP transistors Q1A and Q1B. It is important that these transistors have identical characteristics, otherwise the comparator will not have the required precision. Thus, these transistors part of a BC857BS matched transistor pair sharing the same package. Having both transistors inside one physical package ensures that they are thermally coupled and avoids diverging characteristics due to different junction temperatures.

The voltage comparator compares the voltages V_{in} to V_{out} and controls the MOSFET gate voltage V_g across the resistor R2.

The following equations apply for the voltage V_b between the transistor’s base and the power supply ground:

V_b = V_{in} - V_{eb,1} \implies V_{in} = V_b + V_{eb,1}

V_b = V_{out} - V_{eb,2} \implies V_{out} = V_b + V_{eb,2}

where V_{eb,1} and V_{eb,2} are the emitter-base voltages of transistors Q1A and Q1B. And:

V_{eb,1} \leq -V_{BE}

V_{eb,2} \leq -V_{BE}

Where V_{BE} \approx -650mV is the specified base-emitter voltage drop for BC857BS (see datasheet). Due to the properties of the base-emitter junction which is essentially a diode, the voltages V_{eb,1} and V_{eb,2} are clamped to -V_{BE}. A current can only flow through the emitter-base junction of Q1A or Q1B if the corresponding emitter-base voltage V_{eb,1} or V_{eb,2} reaches (gets slightly higher than) -V_{BE}.

Forward Bias

The following holds true when the ideal diode is forward biased:

V_{in} > V_{out} \implies

V_b + V_{eb,1} > V_b + V_{eb,2} \implies V_{eb,1} > V_{eb,2}

The larger of V_{eb,1} and V_{eb,2} will be clamped to -V_{BE} which leads to the following statements:

V_{eb,1} = -V_{BE}

V_{eb,2} < -V_{BE}

Consequently, current will flow through the emitter-collector path of transistor Q1A while no current will flow through the emitter-collector path of Q1B. Thus, the voltage V_g across the resistor R2 will be equal (or near equal) to 0V. This will lead to a negative gate-source voltage V_{gs} and cause the MOSFET Q1B to turn on.

Reverse Bias

The following holds true when the ideal diode is reverse biased:

V_{in} < V_{out} \implies

V_b + V_{eb,1} < V_b + V_{eb,2} \implies V_{eb,1} < V_{eb,2}

The larger of V_{eb,1} and V_{eb,2} will be clamped to -V_{BE} which leads to the following statements:

V_{eb,1} < -V_{BE}

V_{eb,2} = -V_{BE}

Consequently, current will flow through the emitter-collector path of transistor Q1B while no current will flow through the emitter-collector path of Q1A. Thus, the voltage V_g across the resistor R2 will be equal (or near equal) to V_{out}. This will lead to near zero gate-source voltage V_{gs} and cause the MOSFET Q1B to turn off.

PCB Layout

The circuit has been implemented on a SMD prototyping board as shown in the pictures below. The surface mount MOSFET, transistor pair and 0805 resistors have been connected using jumper wires. The three terminals of the ideal diode have been connected to a pin header.

The left picture shows the top side of the PCB with the visible MOSFET (3 pin package) and dual transistor (6 pin package). The right picture shows the backside of the PCB with the two 0805 resistors. Note that the pads on both sides are connected through the holes.

Following are the pin assignments on the pin header, assuming pin 1 is the leftmost pin and pin 3 is the rightmost pin on the left picture:

  • Pin 1: V_{out}
  • Pin 2: GND
  • Pin 3: V_{in}

Bill of Material

Following is the list of parts required for building the ideal diode. Please consider supporting this website by purchasing your the required parts using the affiliate links below:

Oscilloscope Comparison

I’ve been lately searching for an entry level digital sampling oscilloscope (DSO) around the 400€ price tag. Having exhaustively read through the various forums and watched the numerous product reviews on YouTube, it became pretty clear that there are currently two major candidates on the market that fulfil the current price tag and provide a decent feature set.

  • Rigol DS1054Z
  • Siglent SDS1202X-E

Most of the product reviews that I have come across were clearly biased towards the one or the other device. Thus, I have ordered and tested both devices whose specs and reviews are widely available on the web. I have created the following decision matrix that I would like to share with you, hoping to provide you with a more objective opinion about the two great devices from an electronics hobbyist’s point of view.

Affiliate Links

Please note that I’m not engaged with any of the above manufacturers. I have purchased both devices and am planning to return one of them within the 30 day trial period. Nevertheless, if you would like to support my work, please consider using one of the affiliate links below for an eventual purchase:

The Decision Matrix

Following is the decision matrix that i have used in order to come to a final decision on the device i should keep.

Important: Please bear in mind that the resulting score largely depends on your individual preferences and is by no means an absolute verdict over the goodness of the particular device. Thus, applying different grades and using different priorities might lead to a completely different outcome.

Rigol DS1054Z vs Siglent SDS1000X-E (click to enlarge)

Following is the Excel table that i have used for the generating the above snapshot:

I have only considered the features that I found relevant for my personal use. The features have been prioritized from 1 to 4, whereas 1 has the highest priority.

Each device has been assigned a grade for each of the listed features as follows:

  • Grade 1: feature has exceeded my expectations
  • Grade 0: feature is on par with my expectations
  • Grade -1: feature is worse than I had expected

The feature score has been calculated according to the following formula:

Score = \frac{Grade}{2^{Prio - 1}}

The total score being the the sum of the individual feature scores.

Please free to distribute and use the above table for your own purposes. I do hope that you do find this information useful.